Embodiments of the present invention relate to an array substrate, a manufacturing method thereof, and a display device.
Liquid crystal display (LCD) panels are developed towards large scale and high quality in the field of LCD with the constant update of technology currently. However, the large scale of the LCD panels tend to result in the increase of the wiring resistance of array substrates, and particularly tend to result in the display defects of green cast of display screens, flashes, afterimages and the like when the wiring resistance of common electrode lines is too large.
As illustrated in FIG. 1 which is a schematic structural view of a thin-film transistor (TFT) array substrate, common electrode lines 11 and gate lines 12 are arranged in parallel and prepared by the same process. As there are gate lines between the common electrode lines in a vertical direction (perpendicular to the extending direction of the gate lines 12), via holes are required to be formed in order to achieve the conduction of the common electrode lines 11 in the vertical direction and then form a matrix structure as shown in the figure. In addition, the common electrode lines 11 are connected to various common electrodes 161 in the vertical direction via the via holes and a transparent conductive (ITO) layer 14.
The structural design of the conventional array substrate has the following problems that: on one hand, due to the cumbersome wiring of the conventional common electrode lines, the pixel aperture ratio can be reduced and then the display effect can be influenced; and on the other hand, as the wiring resistance is large, the power consumption of the LCD panels, particularly large-size LCD panels, can be increased.